Samsung reveals details about upcoming 3nm GAE MBCFET chip

It was said that Samsung and TSMC are currently planning to develop 3nm process technology research and development. Now, as per the latest info, Samsung engineers shared the manufacturing details of the upcoming 3nm GAE MBCFET chip at the IEEE International Solid-State Circuits Conference (ISSCC).

According to the information shared by company officials, GAAFET (gate full ring field effect transistors) transistors come in two forms in terms of structure and are an upgraded version of the current FinFET. Samsung believes that the traditional GAAFET process uses three-layer nanowires to construct transistors while the Samsung MBCFET process uses nanosheets to construct transistors.

Join SammyFans on Telegram

Apart from this, the South Korean tech giant has also registered a trademark for MBCFET. And the company said that both methods can achieve 3nm, but it depends on the specific design.

However, the idea of ​​the first GAAFET transistor was proposed in nearly 1988 which allows makers to accurately control performance and power consumption by adjusting the width of the transistor channel. On the other hand, wider materials facilitate higher performance at high power while thinner materials can reduce power consumption, but performance will be affected.

Back in 2019, Samsung demonstrated the principles of the 3GAE process and claimed that compared with 7LPP technology, 3GAE can achieve a 30% performance improvement, a 50% reduction in power, and an 80% increase in transistor density.